Performance Analysis Workshop

8-10 February 2017 – University of Southampton


This workshop is organized by VI-HPS for the UK PRACE Advanced Training Centre in collaboration with the EU Horizon 2020 Performance Optimisation & Productivity Centre of Excellence to:

  • give an overview of the VI-HPS programming tools suite
  • explain the functionality of individual tools, and how to use them effectively
  • offer hands-on experience and expert assistance using the tools

On completion participants should be familiar with common performance analysis and diagnosis techniques and how they can be employed in practice (on a range of HPC systems). Those who prepared their own application test cases will have been coached in the tuning of their measurement and analysis, and provided optimization suggestions.

Programme Overview

Presentations and hands-on sessions are on the following topics:

  • BSC tools for trace analysis and performance prediction
  • Score-P instrumentation and measurement
  • Scalasca automated trace analysis
  • MAP+PR profiling and performance reports

A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.

The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. There is no fee for participation, however, participants are responsible for their own travel and accommodation.

Classroom capacity is limited, therefore priority will be given to applicants with MPI, OpenMP and hybrid OpenMP+MPI parallel codes already running on the workshop computer systems, and those bringing codes from similar systems to work on. Workstations are provided to connect to the workshop computer systems, however, (eduroam) wifi will be available so participants could also use personal notebook computers with SSH and X11 configured.


The workshop introduces tools that provide a practical basis for portable performance analysis of parallel application execution, covering both profiling and tracing. It will be delivered as a series of presentations with associated hands-on practical exercises using the UK’s ARCHER Cray XC30 supercomputer.

While analysis of provided example codes will be used to guide the class through the relevant steps and familiarise with usage of the tools, coaching will also be available to assist participants to analyse their own parallel application codes and may suggest opportunities for improving their execution performance and scalability.

Programme (preliminary)

Day 1: Wednesday 8th February
09:00 Welcome messages [Nico de Tullio & Michael Bareford]
09:15 Introduction

    • Introduction to VI-HPS & overview of tools [JSC]
    • Introduction to parallel performance engineering [Wadud Miah, NAG]
    • Lab setup
  • Archer Cray XC30 computer system and software environment
  • Building and running NPB-MZ-MPI/BT-MZ on Archer Cray XC30
10:30 (break)
11:00 BSC performance tools [BSC]

  • BSC tools hands-on exercises
12:30 (lunch)
14:00 Hands-on coaching to apply tools to analyze participants’ own code(s).
17:00 Review of day and schedule for remainder of workshop
17:30 (adjourn)
Day 2: Thursday 9th February
09:00 Instrumentation & measurement with Score-P [JSC]

  • Score-P hands-on exercises
    Execution profile analysis report exploration with CUBE [JSC]
  • CUBE hands-on exercises
10:30 (break)
11:00 Configuring & customising Score-P measurements [JSC]

  • Score-P hands-on exercises
    Automated trace analysis with Scalasca [JSC]
  • Scalasca hands-on exercises
12:30 (lunch)
14:00 Hands-on coaching to apply tools to analyze participants’ own code(s).
17:00 Review of day and schedule for remainder of workshop
17:30 (adjourn)
Day 3: Friday 10th February
09:00 Allinea performance tools suite [Allinea]

  • Allinea hands-on exercises
10:30 (break)
11:00 POP CoE mission & services
Review of workshop
12:30 (lunch)
14:00 Hands-on coaching to apply tools to analyze participants’ own code(s).
16:00 (adjourn)

Hardware and Software Platforms

ARCHER: Cray XC30 with 3008 compute nodes consisting of two 12-core Intel E5-2697 (IvyBridge) processors sharing 64GB (or 128GB) of NUMA memory, Aries dragonfly interconnect, Cray MPI, Cray, GCC & Intel compilers, PBS Pro job management system. Training accounts will be provided!

Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited. Participants are expected to already possess user accounts on non-local systems they intend to use, and should be familiar with the procedures for compiling and running parallel applications.


Please register via the Registration tab on this page. Note: the number of participants is limited, and preference will be given to those bringing parallel application(s) to analyse and tune as part of the workshop.

Local organisers information page.